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Instruction-level parallelism
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51	060-computer-Geller[removed] Add to Reading List Source URL: webspace.ulbsibiu.ro Language: English - Date: 2007-12-05 00:43:29 Central processing unit CPU cache Cache Computer memory Branch predictor Microarchitecture Parallel computing Superscalar Instruction-level parallelism Computer architecture Computer hardware Computer engineering
52	059-computer-Florea[removed] Add to Reading List Source URL: webspace.ulbsibiu.ro Language: English - Date: 2007-12-05 00:43:29 Central processing unit Computer memory Runahead CPU cache Microarchitecture Memory-level parallelism Parallel computing Branch predictor Instruction set Computer architecture Computer hardware Computer engineering
53	Journal of Instruction-Level Parallelism[removed]Submitted 07/01; published 11/03 Add to Reading List Source URL: www.jilp.org Language: English - Date: 2004-01-21 11:45:56 Cross-platform software Compiler construction Virtual machines Compilers Threaded code OCaml Interpreter Stack machine Bytecode Computing Software Programming language implementation
54	INTRODUCING THE FR500 EMBEDDED MICROPROCESSOR DEVELOPED FOR DIGITAL CONSUMER PRODUCTS, THE FR500 MICROPROCESSOR ISSUES FOUR INSTRUCTIONS SIMULTANEOUSLY AND CAN BE Add to Reading List Source URL: www.ece.umd.edu Language: English - Date: 2002-05-07 12:21:33 Computer engineering Parallel computing Very long instruction word Instruction-level parallelism Branch predication Instruction set Processor register Computer architecture Central processing unit Computing
55	Trace Cache Leon Gu Dipti Motiani Add to Reading List Source URL: www.cs.cmu.edu Language: English - Date: 2003-10-13 07:06:40 Central processing unit CPU cache Cache Computer memory Parallel computing Microarchitecture Branch predictor Superscalar Instruction-level parallelism Computer architecture Computer hardware Computing
56	Exploiting Superword Level Parallelism with Multimedia Instruction Sets Samuel Larsen and Saman Amarasinghe Add to Reading List Source URL: groups.csail.mit.edu Language: English - Date: 2003-12-30 15:52:20 Compiler optimizations Software engineering Vectorization SIMD Stream processing Loop optimization Data parallelism Superword Level Parallelism Vector processor Computing Concurrent computing Parallel computing
57	COM PUT ING PRACT ICES EPIC: Explicitly Parallel Add to Reading List Source URL: www.ece.iupui.edu Language: English - Date: 2006-02-14 18:13:49 Central processing unit Parallel computing Classes of computers Instruction set architectures Explicitly parallel instruction computing Instruction-level parallelism Very long instruction word Microarchitecture Superscalar Computer architecture Computing Computer hardware
58	Lecture 6: Vector Processing Professor David A. Patterson Add to Reading List Source URL: www.cs.berkeley.edu Language: English - Date: 1998-02-11 20:19:26 Central processing unit Classes of computers Parallel computing Superscalar Vector processor Instruction set architectures Reduced instruction set computing Processor register Instruction-level parallelism Computer architecture Computing Computer hardware
59	An Empirical Study of Data Speculation Use on the Intel Itanium 2 Processor Markus Mock Add to Reading List Source URL: www.info.uni-karlsruhe.de Language: English - Date: 2005-07-01 08:51:12 Programming language implementation Advanced load address table Instruction set architectures Itanium Explicitly parallel instruction computing Speculative execution ALAT Instruction-level parallelism Processor register Computer architecture Computer hardware Central processing unit
60	Instruction-Level Parallel Processing: History, Overview and Perspective Add to Reading List Source URL: www.hpl.hp.com Language: English - Date: 2007-10-22 01:10:01 Central processing unit Parallel computing Classes of computers Very long instruction word Superscalar Instruction-level parallelism Microarchitecture Multiflow Instruction set Computer architecture Computing Computer hardware

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